Peter M. Osterberg, Ph.D.

Emeritus Associate Professor of Electrical Engineering (Retired)

University of Portland (Portland, OR)


Contact Information

email: oster@up.edu


Other Information

Academic Vita

The best darn nanotech website on earth: "http://www.nanohub.org"

PhD Thesis: "Electrostatically Actuated Micromechanical Test Structures For Material Property Measurement", Ph.D. Thesis, MIT, May, 1995

Technical Paper: "Quantitative Models for the Measurement of Residual Stress, Poisson Ratio, and Young's Modulus using Electrostatic Pull-in of Beams and Diaphragms", Proceedings of 1994 Solid-State Sensor and Actuator Workshop, Hilton Head, SC, June, 13-16, 1994, pp. 184-188

Technical Paper: "MemBuilder: An Automated 3D Solid Model Construction Program for Microelectromechanical Structures", Proceedings of Tranducers '95, Stockholm, Sweden, June, 1995, Vol. 2, pp. 21-24

Technical Paper: "M-TEST: A Test Chip for MEMS Material Property Measurement Using Electrostatically Actuated Test Structures", IEEE JMEMS, Vol. 6, No. 2, June, 1997

Technical Paper: "A Special Integral Identity and its Applications in Electrcal Circuits", IEE Electronics Letters, Vol. 35, No. 16, August, 1999, pp. 1300-1301

Technical Paper: "Calculation of the Electroquasistatic Sinusoidal Steady-State Coulomb Force on a Conductor Coated with a Lossy Dielectric", Proceedings of the Third International Conference on Modeling and Simulation of Microsystems (MSM2000), San Diego, CA, March 27-29, 2000, pp. 277-280

Technical Paper: "Impedence between adjacent nodes of infinite uniform D-dimensional resistive lattices", Am. J. Phys. 72 (7), July 2004

Technical Paper: "Applications of the Generalized Quadrature Method to the Study of Pull-In Phenomena of MEMS Switches", IEEE JMEMS 16 (7), December 2007

Technical Paper: "CALCULATION OF THE GENERAL IMPEDANCE BETWEEN ADJACENT NODES OF INFINITE UNIFORM N-DIMENSIONAL RESISTIVE, INDUCTIVE, OR CAPACITIVE LATTICES", 2009 ASEE Annual Conference Proceedings, Austin, TX, June 14-17, 2009, (CD-ROM)

Powerpoint Presentation: "CALCULATION OF THE GENERAL IMPEDANCE BETWEEN ADJACENT NODES OF INFINITE UNIFORM N-DIMENSIONAL RESISTIVE, INDUCTIVE, OR CAPACITIVE LATTICES", 2009 ASEE Annual Conference Proceedings, Austin, TX, June 14-17, 2009

Technical Paper: "Electrical Engineering Student Senior Capstone Project: A MOSIS Fast Fourier Transform Processor Chip-Set", 2011 ASEE Annual Conference Proceedings, Vancouver, BC, June 26-29, 2011, (CD-ROM)

Powerpoint Presentation: "Electrical Engineering Student Senior Capstone Project: A MOSIS Fast Fourier Transform Processor Chip-Set", 2011 ASEE Annual Conference Proceedings, Vancouver, BC, June 26-29, 2011

Technical Paper: "Do You Know What's Hidden Inside That There Pi?", The Bent, Tau Beta Pi Engineering Honor Society, Vol. CVII, No. 1, pp. 23-24, Winter 2016

Technical Paper: "Annual Documentation of Assessment and Evaluation of Student Outcomes Simplifies Self-Study Preparation", 2016 ASEE Annual Conference Proceedings, New Orleans, LA, June 26-29, 2016

Technical Paper: "Teaching Electronic Conduction Phenomena to Undergraduate Electrical Engineering Students Using Purdue University’s New 'Bottom-Up' Approach", 2016 ASEE Annual Conference Proceedings, New Orleans, LA, June 26-29, 2016

Technical Paper: "Revisiting the One-Dimensional Elastic Collision of Rigid Bodies on a Frictionless Surface Using Singularity Functions", 2016 ASEE Annual Conference Proceedings, New Orleans, LA, June 26-29, 2016

Sausalito sabbatical photos


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